A well known type of AC drive includes an AC-to-DC converter including a boost rectifier for converting three-phase AC source voltages to DC voltages on a DC bus. The DC bus interfaces the AC-to-DC converter to a DC-to-AC inverter, which is typically a three-phase bridge network of solid state switches, which are switched at high frequency to generate pulse width modulation (PWM) or other types of modulated low frequency power signals which are supplied to an AC motor. These systems generate a common mode voltage measured between a neutral in the motor and an electrical ground. These also generate common mode currents in part the result of parasitic capacitances between mechanical parts in the motor and ground, and between mechanical parts in the motor and the stator windings. It is desirable to attenuate or eliminate these common mode voltages to prevent interference that might trip fault protection devices and to reduce common mode currents in motor bearings that might reduce their service life. Passive circuits including filters and transformers have been employed to correct this problem, but with increased production costs and increased installation costs. A number of prior art publications have suggested modifications to inverter modulation methods to control the inverter common mode voltages. This approach has cost and manufacturing advantages over passive circuits.
The inverter switching states can be modeled with the aid of a space vector PWM (SVPWM) theory and diagram more fully described below. Two of the vectors in this theory are zero-voltage switching vectors (V0 and V7). Some prior art methods skip these vectors by using two active vectors that are 180 degrees out of phase. However, these modified modulation schemes require that dwell time (on time for the inverter switches) be calculated in real time.
The dead-time effect, where there is time delay between one phase voltage being turned on or off and the next phase being switched to the opposite state, has been investigated while using different modified modulation schemes. A null state switching sequence without zero-voltage switching vectors has been described in the art to be the optimal common-mode voltage reduction PWM technique. Also, a method to cope with the dead-time effects at the transition of two sectors in the direct-digital SVPWM switching sequence has been described in the art.
It would be advantageous to provide other common-mode voltage reduction methods for a PWM carrier-based modulation that remove the effects of dead time.